Product Summary
The TMS320C6415EGLZ5E0 is the highest-performance fixed-point DSP generation in the TMS320C6000 DSP platform. It is based on the second-generation high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture (VelociTI.2) developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. The TMS320C6415EGLZ5E0 has two high-performance embedded coprocessors [Viterbi Decoder Coprocessor (VCP) and Turbo Decoder Coprocessor (TCP)] that significantly speed up channel-decoding operations on-chip. It uses a two-level cache-based architecture and has a powerful and diverse set of peripherals.
Parametrics
Absolute maximum ratings over operating case temperature range: (1)Supply voltage ranges: CVDD (see Note 1): 0.3 V to 1.8 V; DVDD (see Note 1):0.3 V to 4 V; (2)Input voltage ranges: (except PCI), VI:0.3 V to 4 V; (PCI), VIP [C6415 and C6416 only]:0.5 V to DVDD + 0.5 V; (3)Output voltage ranges: (except PCI), VO:0.3 V to 4 V; (PCI), VOP [C6415 and C6416 only]:0.5 V to DVDD + 0.5 V; (4)Operating case temperature ranges, TC: (default):0C to 90C; (A version) [A-5E0, A-6E3]:40℃ to105℃ ; (5)Storage temperature range, Tstg:65℃ to 150℃.
Features
Features: (1)Highest-Performance Fixed-Point Digital Signal Processors (DSPs); (2)VelociTI.2 Extensions to VelociTI Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x DSP Core; (3)L1/L2 Memory Architecture; (4)Two External Memory Interfaces (EMIFs); (5)Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels); (6)32-Bit/33-MHz, 3.3-V PCI Master/Slave Interface Conforms to PCI Specification 2.2; (7)Three Multichannel Buffered Serial Ports; (8)Three 32-Bit General-Purpose Timers; (9)Universal Test and Operations PHY Interface for ATM (UTOPIA) ; (10)Sixteen General-Purpose I/O (GPIO) Pins; (11)Flexible PLL Clock Generator; (12)IEEE-1149.1 (JTAG?)Boundary-Scan-Compatible; (13)532-Pin Ball Grid Array (BGA) Package(GLZ and ZLZ Suffix), 0.8-mm Ball Pitch; (14)0.13-μm/6-Level Cu Metal Process (CMOS); (15)3.3-V I/Os, 1.2-V/1.25-V Internal (500 MHz); (16)3.3-V I/Os, 1.4-V Internal (600 and 720 MHz).
Diagrams
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